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Product data sheet Rev. 02 — 7 December 2006 15 of 91

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

C-bus controller

7.3.2.6 The I

C-bus mode register, I2CMODE (indirect address 06h)

I2CMODE is an 8-bit read/write register. It contains the control bits that select the correct

timing parameters when the device is used in master mode (AC[1:0]). Timing parameters

involved with AC[1:0] are t

BUF

, t

HD;STA

, t

SU;STA

, t

SU;STO

, t

HIGH

, t

LOW

Remark: Change from an I

C-bus mode to a slower one (Fast-mode to Standard-mode,

for example) will cause the HIGH and LOW timings of SCL to be violated. It is then

required to program the I2CSCLL and I2CSCLH registers with values in accordance with

the selected mode.

[1] I2CSCLL and I2CSCLH values in the table also represents the minimum values that can be used for the

corresponding I

C-bus mode. Use of lower values will cause the minimum values to be loaded.

[2] Using the formula

Table 23. I2CMODE - I

C-bus Mode register (indirect address 06h) bit allocation

7 6 5 4 3 2 1 0

------AC1AC0

Table 24. I2CMODE - I

C-bus Mode register (indirect address 06h) bit description

Bit Symbol Description

7:2 - Reserved. When I2CMODE is read, zeroes are read. Must be written

with zeroes.

1:0 AC[1:0] I

C-bus mode selection to ensure proper timing parameters (see

Table 25).

AC[1:0] = 00: Standard-mode AC parameters selected.

AC[1:0] = 01: Fast-mode AC parameters selected.

AC[1:0] = 10: Fast-mode Plus AC parameters selected.

AC[1:0] = 11: Turbo mode. In this mode, the user is not limited to a

maximum frequency of 1 MHz.

Table 25. I

C-bus mode selection example

[1]

I2CSCLL

(hexadecimal)

I2CSCLH

(hexadecimal)

C-bus frequency

(kHz)

[2]

AC[1:0] Mode

9D 86 99.9 00 Standard

2C 14 396.8 01 Fast

11 09 952.3 10 Fast-mode Plus

0E 05 11 Turbo mode

SCL

osc

I2CSCLL I2CSCLH+()t

-----------------------------------------------------------------------------------------------

1 2 ... 10 11 12 13 14 15 16 17 18 19 20 ... 90 91

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